mathematical instructions
addition
add(reg, val) add val to register
reg = reg + val
add(regA, regB, val) add val to regB and put result into regA
regA = regB + val
regA can be same as regB i.e.
add(r0, r1, 3)
add(r0, r0, 3)
add(regA, regB, regC) add regC to regB and put result into regA
regA = regB + regC
adc(regA, regB) add with carry - add regA to regB plus carry_flag and put result into regA
regA = regA + regB + carry
The following demonstrates this, with the carry bit being added only if the r2 argument is 1:
@micropython.asm_thumb
def test(r0, r1, r2):
cmp(r2, 1)
bne(NOCARRY)
movw(r3, 0xffff)
movt(r3, 0xffff)
b(CARRY)
label(NOCARRY)
mov(r3, 0)
label(CARRY)
add(r3, r3, r3) # Carry set if we loaded it with 0xffffffff
adc(r0, r1)
subtraction
sub(reg, val) subtract val from register
'reg = reg-val`
will switch the high bit to signify a negative result care with pointer operations required
sub(regA, regB, val) subtract val from regB and put into regA (regB can be same as regA)
regA = regB - val
sub(regA, regB, regC) subtract regC from regB and put into regA (regB can be same as regA)
regA = regC - regB
sbc(regA, regB) subtract with carry - regA-regB(-1 if carry flag is clear)
negation
neg(regA, regB) negative - make regB negative and move into regA (overwrite) (regB can be same as regA)
regA = -regB
neg(regA, regA) will just make regA negative, without affecting anything else
multiplication and division
mul(regA, regB) multiply regA by regB result into regA
regA = regA * regB
Only the least significant 32 bits of the multiplication are saved. If the calculation overflows, the condition flags are affected.
sdiv(rega, regb, regc) Signed division: divide regB by regC and put the result in regA with numbers treated as signed integers
regA = regB//regC
udiv(rega, regb, regc) Unsigned division: divide regB by regC and put the result in regA with numbers treated as unsigned integers
regA = regB//regC